Recent advancements in biomedical research and imaging applications have ignited an intense interest in single-photon detection. Along with single-photon resolution, nanosecond or sub-nanosecond timing resolution and high sensitivity of the device must be achieved at the same time. Single- Photon Avalanche Diodes (SPADs) have proved their prospectives in terms of shot-noise limited operation, excellent timing resolution and wide spec- tral range. Nonetheless, the performance of recently presented SPAD based arrays has an issue of low detection efficiency by reason of the area on the substrate occupied by additional processing electronics. This dissertation presents the design and experimental characteriza- tion of a few compact analog readout circuits for SPAD based arrays. Tar- geting the applications where the spatial resolution is the key requirement, the work is focused on the circuit compactness, that is, pixel fill factor re- finement. Consisting of only a few transistors, the proposed structures are remarkable for a small area occupation. This significant advancement has been achieved with the analog implementation of the additional circuitry instead of standard digital approach. Along with the compactness, the dis- tinguishing features of the circuits are low power consumption, low output non-linearity and pixel-to-pixel non-uniformity. In addition, experimental results on a time-gated operation have proved feasibility of a sub-nanosecond time window.
Design and characterisation of SPAD based CMOS analog pixels for photon-counting applications / Panina, Ekaterina. - (2014), pp. 1-152.
Design and characterisation of SPAD based CMOS analog pixels for photon-counting applications
Panina, Ekaterina
2014-01-01
Abstract
Recent advancements in biomedical research and imaging applications have ignited an intense interest in single-photon detection. Along with single-photon resolution, nanosecond or sub-nanosecond timing resolution and high sensitivity of the device must be achieved at the same time. Single- Photon Avalanche Diodes (SPADs) have proved their prospectives in terms of shot-noise limited operation, excellent timing resolution and wide spec- tral range. Nonetheless, the performance of recently presented SPAD based arrays has an issue of low detection efficiency by reason of the area on the substrate occupied by additional processing electronics. This dissertation presents the design and experimental characteriza- tion of a few compact analog readout circuits for SPAD based arrays. Tar- geting the applications where the spatial resolution is the key requirement, the work is focused on the circuit compactness, that is, pixel fill factor re- finement. Consisting of only a few transistors, the proposed structures are remarkable for a small area occupation. This significant advancement has been achieved with the analog implementation of the additional circuitry instead of standard digital approach. Along with the compactness, the dis- tinguishing features of the circuits are low power consumption, low output non-linearity and pixel-to-pixel non-uniformity. In addition, experimental results on a time-gated operation have proved feasibility of a sub-nanosecond time window.File | Dimensione | Formato | |
---|---|---|---|
PhD-Thesis.pdf
accesso aperto
Tipologia:
Tesi di dottorato (Doctoral Thesis)
Licenza:
Tutti i diritti riservati (All rights reserved)
Dimensione
25.95 MB
Formato
Adobe PDF
|
25.95 MB | Adobe PDF | Visualizza/Apri |
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione