Optimized Single-Electron Bipolar Avalanche Transistors for Innovative THz/IR Imaging Systems

This thesis presents the design, test and characterization of optimized Single-Electron Bipolar Avalanche Transistors (SEBAT) for use in fully-integrated antenna-coupled Field-Effect Tran-sitor (FET) detector arrays. Targeting the TeraHertz (THz) and Long-Wavelength Infra-Red (LWIR) spectra, these detectors offer the advantage of room-temperature, vacuum-free opera-tion and compatibility with standard Complementary Metal-Oxide Semiconductor (CMOS) fabrication technology, but they are limited by poor Signal-to-Noise Ratios (SNR) due to weak optical input power and large low-frequency noise. Traditional readout architectures address this challenge through a multi-stage amplification chain that can operate even in presence of faint signals limiting the impact of flicker noise. However, these schemes necessitate complex, area-consuming and power-intensive circuitry that hinders the scalability of high-resolution, real-time imaging systems. SEBAT-based architectures have emerged as a promising alternative that exploits the device’s intrinsic avalanche multiplication to convert the signal generated by the detector directly into a train of digital pulses, thereby eliminating the need for external analog amplification. Unfortunately, early experimental implementations in deep sub-micron technology exhibited poor efficiency, with electron-to-pulse conversion rates of only 0.001%, four orders of magni-tude below theoretical predictions and state-of-the-art devices. This research work addresses the challenge of optimizing the SEBAT device for THz and IR imagers based on antenna-coupled FET-detectors through: • Problem analysis – Identifying the physical mechanism limiting existing implementa-tions using Technology Computer-Assisted Design (TCAD) simulations and matching the results with experimental data. • Modeling – Developing a comprehensive SPICE model for the SEBAT characterized by low complexity to facilitate the design of fully-integrated large-scale antenna-coupled FET detector arrays. • Optimization and fabrication – Designing, testing and characterizing optimized SEBAT devices in 110 nm CMOS standard technology, overcoming the limitations of previous implementations. • Image sensor development – Integrating the optimized devices in detector arrays target-ing 0.9 THz, 1.5 THz and 21-38 THz (corresponding to the spectral LWIR range of 8-14 μm). Experimental results demonstrate that the optimized SEBAT implementations achieve efficien-cies compatible with single-electron detection. This achievement enables compact, power-efficient detector arrays through standard 110 nm CMOS fabrication for applications in securi-ty screening, biomedical diagnostics, and industrial inspection.