This paper advocates a rigorously formal and compositional style for obtaining key performance and/or interface metrics of systems with real-time constraints. We propose a hierarchical approach that couples the independent and different by nature frameworks of Modular Performance Analysis with Real-time Calculus (MPARTC) and Parametric Feasibility Analysis (PFA). Recent work on Real-time Calculus (RTC) has established an embedding of state-based component models into RTC-driven performance analysis for dealing with more expressive component models. However, with the obtained analysis infrastructure it is possible to analyze components only for a fixed set of parameters, e. g., fixed CPU speeds, fixed buffer sizes etc., such that a big space of parameters remains unstudied. In this paper, we overcome this limitation by integrating the method of parametric feasibility analysis in an RTC-based modeling environment. Using the PFA tool-flow, we are able to find regions for component paramet...

Enabling Parametric Feasibility Analysis in Real-time Calculus Driven Performance Evaluation / Simalatsar, Alena; Ramadian, Yusi; Lampka, K.; Perathoner, S.; Passerone, Roberto; Thiele, L.. - ELETTRONICO. - (2011), pp. 155-164. ( Embedded Systems Week 2011, ESWEEK 2011 - 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11 Taipei, Taiwan 9-14 October 2011) [10.1145/2038698.2038723].

Enabling Parametric Feasibility Analysis in Real-time Calculus Driven Performance Evaluation

Simalatsar, Alena;Ramadian, Yusi;Passerone, Roberto;
2011-01-01

Abstract

This paper advocates a rigorously formal and compositional style for obtaining key performance and/or interface metrics of systems with real-time constraints. We propose a hierarchical approach that couples the independent and different by nature frameworks of Modular Performance Analysis with Real-time Calculus (MPARTC) and Parametric Feasibility Analysis (PFA). Recent work on Real-time Calculus (RTC) has established an embedding of state-based component models into RTC-driven performance analysis for dealing with more expressive component models. However, with the obtained analysis infrastructure it is possible to analyze components only for a fixed set of parameters, e. g., fixed CPU speeds, fixed buffer sizes etc., such that a big space of parameters remains unstudied. In this paper, we overcome this limitation by integrating the method of parametric feasibility analysis in an RTC-based modeling environment. Using the PFA tool-flow, we are able to find regions for component paramet...
2011
Proceedings of the International Conference on Compilers, Architectures and Synthesis of Embedded Systems (CASES11)
1515 BROADWAY, NEW YORK, NY 10036-9998 USA
IEEE
9781450307130
Simalatsar, Alena; Ramadian, Yusi; Lampka, K.; Perathoner, S.; Passerone, Roberto; Thiele, L.
Enabling Parametric Feasibility Analysis in Real-time Calculus Driven Performance Evaluation / Simalatsar, Alena; Ramadian, Yusi; Lampka, K.; Perathoner, S.; Passerone, Roberto; Thiele, L.. - ELETTRONICO. - (2011), pp. 155-164. ( Embedded Systems Week 2011, ESWEEK 2011 - 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11 Taipei, Taiwan 9-14 October 2011) [10.1145/2038698.2038723].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11572/89048
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