Many approaches for Satisfiability Modulo Theory (SMT(T)) rely on the integration between a SAT solver and a decision procedure for sets of literals in the background theory T (T-solver). When T is the combination T1 ∪ T2 of two simpler theories, the approach is typically handled by means of Nelson-Oppen's (NO) theory combination schema in which two specific T-solvers deduce and exchange (disjunctions of) interface equalities. In recent papers we have proposed a new approach to SMT(T1 ∪ T 2), called Delayed Theory Combination (DTC). Here part or all the (possibly very expensive) task of deducing interface equalities is played by the SAT solver itself, at the potential cost of an enlargement of the boolean search space. In principle this enlargement could be up to exponential in the number of interface equalities generated. In this paper we show that this estimate was too pessimistic. We present a comparative analysis of DTC vs. NO for SMT(T1 ∪ T2), which shows that, using stateof-the-a...

Delayed Theory Combination vs. Nelson-Oppen for Satisfiability Modulo Theories: a Comparative Analysis

Bruttomesso, Roberto;Franzen, Per Anders;Griggio, Alberto;Sebastiani, Roberto
2006-01-01

Abstract

Many approaches for Satisfiability Modulo Theory (SMT(T)) rely on the integration between a SAT solver and a decision procedure for sets of literals in the background theory T (T-solver). When T is the combination T1 ∪ T2 of two simpler theories, the approach is typically handled by means of Nelson-Oppen's (NO) theory combination schema in which two specific T-solvers deduce and exchange (disjunctions of) interface equalities. In recent papers we have proposed a new approach to SMT(T1 ∪ T 2), called Delayed Theory Combination (DTC). Here part or all the (possibly very expensive) task of deducing interface equalities is played by the SAT solver itself, at the potential cost of an enlargement of the boolean search space. In principle this enlargement could be up to exponential in the number of interface equalities generated. In this paper we show that this estimate was too pessimistic. We present a comparative analysis of DTC vs. NO for SMT(T1 ∪ T2), which shows that, using stateof-the-a...
2006
Logic for Programming, Artificial Intelligence, and Reasoning13th International Conference, LPAR 2006, Phnom Penh, Cambodia, November 13-17, 2006, Proceedings
berlin
Springer
9783540482819
Bruttomesso, Roberto; A., Cimatti; Franzen, Per Anders; Griggio, Alberto; Sebastiani, Roberto
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11572/77981
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