The availability of powerful Field Programmable Gate Arrays (FPGA) has been exploited for their ability to provide hardware solutions for many application areas, resulting in high-performance systems that can operate in real time by operating in parallel. The Support Vector Machine computational paradigm can be cast as a collection of multiple streams operating in parallel on one such FPGA. This paper presents a parallel architecture that implements an SVM on a Xilinx FPGA. The results obtained by using this architecture for a complex pattern classification from high- energy physics involving thousands of patterns are reported and discussed, comparing the performance obtained by this architectural solution to that of a simpler sequential architecture.

A reconfigurable parallel architecture for SVM

Boni, Andrea;Zorat, Alessandro
2005-01-01

Abstract

The availability of powerful Field Programmable Gate Arrays (FPGA) has been exploited for their ability to provide hardware solutions for many application areas, resulting in high-performance systems that can operate in real time by operating in parallel. The Support Vector Machine computational paradigm can be cast as a collection of multiple streams operating in parallel on one such FPGA. This paper presents a parallel architecture that implements an SVM on a Xilinx FPGA. The results obtained by using this architecture for a complex pattern classification from high- energy physics involving thousands of patterns are reported and discussed, comparing the performance obtained by this architectural solution to that of a simpler sequential architecture.
Proceedings of the International Joint Conference on Neural Networks (IJCNN) 2005 : July 31-August 4, 2005, Hilton Montréal Bonaventure Hotel, Montréal, Québec, Canada
Piscataway (NJ)
IEEE
0780390482
I., Biasi; Boni, Andrea; Zorat, Alessandro
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11572/64777
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