The availability of powerful Field Programmable Gate Arrays (FPGA) has been exploited for their ability to provide hardware solutions for many application areas, resulting in high-performance systems that can operate in real time by operating in parallel. The Support Vector Machine computational paradigm can be cast as a collection of multiple streams operating in parallel on one such FPGA. This paper presents a parallel architecture that implements an SVM on a Xilinx FPGA. The results obtained by using this architecture for a complex pattern classification from high- energy physics involving thousands of patterns are reported and discussed, comparing the performance obtained by this architectural solution to that of a simpler sequential architecture.
|Titolo:||A reconfigurable parallel architecture for SVM|
|Autori:||I., Biasi; Boni, Andrea; Zorat, Alessandro|
|Titolo del volume contenente il saggio:||Proceedings of the International Joint Conference on Neural Networks (IJCNN) 2005 : July 31-August 4, 2005, Hilton Montréal Bonaventure Hotel, Montréal, Québec, Canada|
|Luogo di edizione:||Piscataway (NJ)|
|Anno di pubblicazione:||2005|
|Appare nelle tipologie:||04.1 Saggio in atti di convegno (Paper in proceedings)|