Arm CPU architectures, thanks to their efficiency and flexibility, have been widely adopted in portable user devices such as smartphones, tablets, and laptops. Recently, the high computing efficiency, together with the unique possibility that Arm offers to adapt the architecture for a specific application, pushed the adoption of Arm-based systems both in HPC (High Performance Computing) applications and autonomous vehicles. The possibility of modifying Arm architecture can potentially be extremely beneficial, as selective fault tolerance solutions can be added at the microarchitectural level. The current trend in the design of computing devices is to integrate several functionalities on the same SoC (System-On-Chip). Modern SoCs usually integrate (one or more) CPUs and (one or more) accelerators, such as GPUS (Graphics Processing Units) or FPGAS (Field Programmable Gate Arrays). These SoCs typically allow the computing cores to share common memories, which significantly improves the performance and reduces the total power consumption but may impact the system's reliability. In this work, we have evaluated the impact of SoC integration and OS deployment using beam experiments and microarchitectural fault injection.

The Impact of SoC Integration and OS Deployment on the Reliability of Arm Processors / Bodmann, Pablo; Papadimitriou, George; Gizopoulos, Dimitris; Rech, Paolo. - (2021), pp. 223-225. (Intervento presentato al convegno ISPASS 2021 tenutosi a Stony Brook, NY, USA (virtual conference) nel 28th-30th March 2021) [10.1109/ISPASS51385.2021.00040].

The Impact of SoC Integration and OS Deployment on the Reliability of Arm Processors

Rech, Paolo
Ultimo
2021-01-01

Abstract

Arm CPU architectures, thanks to their efficiency and flexibility, have been widely adopted in portable user devices such as smartphones, tablets, and laptops. Recently, the high computing efficiency, together with the unique possibility that Arm offers to adapt the architecture for a specific application, pushed the adoption of Arm-based systems both in HPC (High Performance Computing) applications and autonomous vehicles. The possibility of modifying Arm architecture can potentially be extremely beneficial, as selective fault tolerance solutions can be added at the microarchitectural level. The current trend in the design of computing devices is to integrate several functionalities on the same SoC (System-On-Chip). Modern SoCs usually integrate (one or more) CPUs and (one or more) accelerators, such as GPUS (Graphics Processing Units) or FPGAS (Field Programmable Gate Arrays). These SoCs typically allow the computing cores to share common memories, which significantly improves the performance and reduces the total power consumption but may impact the system's reliability. In this work, we have evaluated the impact of SoC integration and OS deployment using beam experiments and microarchitectural fault injection.
2021
2021 IEEE International Symposium on Performance Analysis of Systems and Software Proceedings
Piscataway, NJ, USA
Institute of Electrical and Electronics Engineers Inc.
978-1-7281-8643-6
Bodmann, Pablo; Papadimitriou, George; Gizopoulos, Dimitris; Rech, Paolo
The Impact of SoC Integration and OS Deployment on the Reliability of Arm Processors / Bodmann, Pablo; Papadimitriou, George; Gizopoulos, Dimitris; Rech, Paolo. - (2021), pp. 223-225. (Intervento presentato al convegno ISPASS 2021 tenutosi a Stony Brook, NY, USA (virtual conference) nel 28th-30th March 2021) [10.1109/ISPASS51385.2021.00040].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11572/403744
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