TOTEM is digital VLSI parallel processor ideally suitable for vectormatrix multiplication. As such, it provides the core computational engine for digital signal processing and artificial neural network algorithms. It has been implemented in the past as a full-custom IP core, achieving high data throughput at clock frequencies of up to 30 MHz. This paper presents the ‘soft’ implementation of the TOTEM neural chip, and compares its cost and performance to previous ‘hard’ implementations.

SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processor / Clementel, Luca; Sartori, Alvise; Boni, Andrea; Mcbader, Stephanie; Lee, Peter. - ELETTRONICO. - (2002).

SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processor

Boni, Andrea;
2002-01-01

Abstract

TOTEM is digital VLSI parallel processor ideally suitable for vectormatrix multiplication. As such, it provides the core computational engine for digital signal processing and artificial neural network algorithms. It has been implemented in the past as a full-custom IP core, achieving high data throughput at clock frequencies of up to 30 MHz. This paper presents the ‘soft’ implementation of the TOTEM neural chip, and compares its cost and performance to previous ‘hard’ implementations.
2002
Trento, Italia
Università degli Studi di Trento. DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY
SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processor / Clementel, Luca; Sartori, Alvise; Boni, Andrea; Mcbader, Stephanie; Lee, Peter. - ELETTRONICO. - (2002).
Clementel, Luca; Sartori, Alvise; Boni, Andrea; Mcbader, Stephanie; Lee, Peter
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11572/358467
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