Mobile applications require the use of specialized design techniques to reduce power consumption and maximize battery life. New implementation technologies are able to reduce energy at the device level. At the same time, architectural choices can lead to significantly different power consumption profiles for equivalent implementations of the same function. In this paper we focus on the architectural level, and analyze various implementation alternatives for the CORDIC function. Our results provide insight into the trade-offs between area, performance and power consumption, and give designers directions for their architectural choices.

Power-aware architectural exploration of the CORDIC algorithm

Passerone, Roberto;Rizzon, Luca
2013-01-01

Abstract

Mobile applications require the use of specialized design techniques to reduce power consumption and maximize battery life. New implementation technologies are able to reduce energy at the device level. At the same time, architectural choices can lead to significantly different power consumption profiles for equivalent implementations of the same function. In this paper we focus on the architectural level, and analyze various implementation alternatives for the CORDIC function. Our results provide insight into the trade-offs between area, performance and power consumption, and give designers directions for their architectural choices.
2013
Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
USA
IEEE
9781467345804
J., Manica; Passerone, Roberto; Rizzon, Luca
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11572/33645
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