Digital control for low-cost high-frequency dc-dc converters requires a reduced number of bit for Analog to Digital Converters (ADCs). By assuming that the sampled variable exhibits a linear behavior during switch-on and switch-off phases, this paper investigates a simple method to increase the ADC resolution using a low resolution Digital to Analog Converter (DAC) and a comparator. The digital estimation is performed using geometrical considerations and assuming the knowledge of the slope of the triangular ripple waveform. The estimation algorithm requires only a rough knowledge of system parameters and it can be easily self-adjusted. Applications to current loop control, VRM control, output voltage control with electrolytic output capacitors are reported. Simulation and experimental results of a synchronous buck converter (1.3V -10 A) using a Field Programmable Gate Array (FPGA) confirm the properties of the proposed investigation.

Reduction of quantization effects in digitally controlled dc-dc converters using inductor current estimation / Stefanutti, W.; Della Monica, E.; Tedeschi, E.; Mattavelli, P.; Saggini, S.. - (2006), pp. 1-7. (Intervento presentato al convegno 37th IEEE Power Electronics Specialists Conference 2006, PESC'06 tenutosi a Jeju, kor nel 2006) [10.1109/PESC.2006.1711789].

Reduction of quantization effects in digitally controlled dc-dc converters using inductor current estimation

Tedeschi E.;
2006-01-01

Abstract

Digital control for low-cost high-frequency dc-dc converters requires a reduced number of bit for Analog to Digital Converters (ADCs). By assuming that the sampled variable exhibits a linear behavior during switch-on and switch-off phases, this paper investigates a simple method to increase the ADC resolution using a low resolution Digital to Analog Converter (DAC) and a comparator. The digital estimation is performed using geometrical considerations and assuming the knowledge of the slope of the triangular ripple waveform. The estimation algorithm requires only a rough knowledge of system parameters and it can be easily self-adjusted. Applications to current loop control, VRM control, output voltage control with electrolytic output capacitors are reported. Simulation and experimental results of a synchronous buck converter (1.3V -10 A) using a Field Programmable Gate Array (FPGA) confirm the properties of the proposed investigation.
2006
PESC Record - IEEE Annual Power Electronics Specialists Conference
Piscataway, New Jersey, United States
IEEE
0-7803-9716-9
Stefanutti, W.; Della Monica, E.; Tedeschi, E.; Mattavelli, P.; Saggini, S.
Reduction of quantization effects in digitally controlled dc-dc converters using inductor current estimation / Stefanutti, W.; Della Monica, E.; Tedeschi, E.; Mattavelli, P.; Saggini, S.. - (2006), pp. 1-7. (Intervento presentato al convegno 37th IEEE Power Electronics Specialists Conference 2006, PESC'06 tenutosi a Jeju, kor nel 2006) [10.1109/PESC.2006.1711789].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11572/335786
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