This paper presents the result of a multidisciplinary experiment where electrical activity from a cultured rat hippocampi neuronal population is detected in real time by a FPGA implemented digital circuit. State-of-the-art EOMOSFET Multi Electrode Array (MEA) biosensors exploits a capacitive coupling between the biological environment and the sensing electronics to minimize invasiveness and cell damage, at the price of a lower SNR. For this reason, they are typically improved by noise rejection algorithms. Real time neural spikes detection opens unthinkable scenarios, allowing to stimulate single neurons in response to their behavior, possibly improving medical conditions like epilepsy. In this scenario, a spike sorting algorithm has been hardware implemented, allowing real time neural spike detection with a latency of 165ns.

Real-time digital implementation of a principal component analysis algorithm for neurons spike detection / Vallicelli, E. A.; Fary, F.; Baschirotto, A.; De Matteis, M.; Reato, M.; Maschietto, M.; Rocchi, F.; Vassanelli, S.; Guarrera, D.; Collazuol, G.; Zeitler, R.. - (2018), pp. 33-36. (Intervento presentato al convegno 2018 International Conference on IC Design and Technology, ICICDT 2018 tenutosi a ita nel 2018) [10.1109/ICICDT.2018.8399749].

Real-time digital implementation of a principal component analysis algorithm for neurons spike detection

Rocchi F.;
2018-01-01

Abstract

This paper presents the result of a multidisciplinary experiment where electrical activity from a cultured rat hippocampi neuronal population is detected in real time by a FPGA implemented digital circuit. State-of-the-art EOMOSFET Multi Electrode Array (MEA) biosensors exploits a capacitive coupling between the biological environment and the sensing electronics to minimize invasiveness and cell damage, at the price of a lower SNR. For this reason, they are typically improved by noise rejection algorithms. Real time neural spikes detection opens unthinkable scenarios, allowing to stimulate single neurons in response to their behavior, possibly improving medical conditions like epilepsy. In this scenario, a spike sorting algorithm has been hardware implemented, allowing real time neural spike detection with a latency of 165ns.
2018
ICICDT 2018 - International Conference on IC Design and Technology, Proceedings
Piscataway, New Jersey, Stati Uniti
Institute of Electrical and Electronics Engineers Inc.
978-1-5386-2550-7
Vallicelli, E. A.; Fary, F.; Baschirotto, A.; De Matteis, M.; Reato, M.; Maschietto, M.; Rocchi, F.; Vassanelli, S.; Guarrera, D.; Collazuol, G.; Zeitler, R.
Real-time digital implementation of a principal component analysis algorithm for neurons spike detection / Vallicelli, E. A.; Fary, F.; Baschirotto, A.; De Matteis, M.; Reato, M.; Maschietto, M.; Rocchi, F.; Vassanelli, S.; Guarrera, D.; Collazuol, G.; Zeitler, R.. - (2018), pp. 33-36. (Intervento presentato al convegno 2018 International Conference on IC Design and Technology, ICICDT 2018 tenutosi a ita nel 2018) [10.1109/ICICDT.2018.8399749].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11572/286615
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