<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/CINECAstyle.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-09-19T15:23:04Z</responseDate><request verb="GetRecord" identifier="oai:iris.unitn.it:11572/368765" metadataPrefix="oai_dc">https://iris.unitn.it/oai/request</request><GetRecord><record><header><identifier>oai:iris.unitn.it:11572/368765</identifier><datestamp>2026-04-03T00:48:40Z</datestamp><setSpec>com_11572_237821</setSpec><setSpec>com_11572_101871</setSpec><setSpec>col_11572_237822</setSpec></header><metadata><oai_dc:dc xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:doc="http://www.lyncode.com/xoai" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd">
<dc:title>An Effective SMT Engine for Formal Verification</dc:title>
<dc:creator>Griggio, Alberto</dc:creator>
<dc:contributor>Griggio, Alberto</dc:contributor>
<dc:contributor>Sebastiani, Roberto</dc:contributor>
<dc:contributor>Cimatti, Alessandro</dc:contributor>
<dc:subject>Settore INF/01 - Informatica</dc:subject>
<dc:subject>Settore ING-INF/05 - Sistemi di Elaborazione delle Informazioni</dc:subject>
<dc:subject>Settore MAT/01 - Logica Matematica</dc:subject>
<dc:description>Formal methods are becoming increasingly important for debugging and verifying hardware and software systems, whose current complexity makes the traditional
approaches based on testing increasingly-less adequate. One of the most promising research directions in formal verification is based on the exploitation of Satisfiability Modulo Theories (SMT) solvers. In this thesis,
we present MathSAT, a modern, efficient SMT solver that provides several important functionalities, and can be used as a workhorse engine in formal verification. We develop novel algorithms for two functionalities which are
very important in verification -- the extraction of unsatisfiable cores and the generation of Craig interpolants in SMT -- that significantly advance the
state of the art, taking full advantage of modern SMT techniques.  Moreover, in order to demonstrate the usefulness and potential of SMT in verification,
we develop a novel technique for software model checking, that fully exploits the power and functionalities of the SMT engine, showing that this leads to significant improvements in performance.</dc:description>
<dc:date>2009</dc:date>
<dc:type>info:eu-repo/semantics/doctoralThesis</dc:type>
<dc:identifier>https://hdl.handle.net/11572/368765</dc:identifier>
<dc:identifier>http://dx.doi.org/10.15168/11572_368765</dc:identifier>
<dc:identifier>10.15168/11572_368765</dc:identifier>
<dc:language>eng</dc:language>
<dc:relation>firstpage:1</dc:relation>
<dc:relation>lastpage:255</dc:relation>
<dc:relation>numberofpages:255</dc:relation>
<dc:rights>info:eu-repo/semantics/openAccess</dc:rights>
<dc:publisher>Università degli studi di Trento</dc:publisher>
<dc:rights>license:Tutti i diritti riservati (All rights reserved)</dc:rights>
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